DemodBlock Class Reference

Demodulation block setting object. More...

Collaboration diagram for DemodBlock:

Public Member Functions
def	setup (self, float readout_frequency, float adc_sampling_interval, int num_adc_samples)
	Generates the demodulator frequency word info. More...

Public Attributes
	frequency_word
	Demodulator frequency word. More...
	id
	Unique ID for demodulator block. More...
	num_cycles
	Number of FPGA clock cycles. More...

Detailed Description

Demodulation block settings handler.
This will while receving data on the ADC, execute demodulation operation to extract a specific frequency component from the incoming signal.
To extract multiple frequency on the same signal use the multiple demodulation block on the same ADC channel.
To get the demodulation information back from the system invoke the acquisition.subsystem.AcquisitionSubsystem.acquire_iq after setting up the blocks.
The extracted I and Q are also passed to the associated State determination.
To retrieve the qubit state, invoke acquisition.subsystem.AcquisitionSubsystem.acquire_demod_state function.
This block needs to be set up with relevant frequency (and / or state determination) information before use.

Member Function Documentation

setup()

setup	(		self,
		float	readout_frequency,
		float	adc_sampling_interval,
		int	num_adc_samples
	)

Generates the properly formatted frequency word information for the demodulator.

Parameters

[in]	readout_frequency	Signal Frequency to extract. Qubit readout frequency
[in]	adc_sampling_interval	Time interval of each ADC Sample. This is the inverse of the ADC Sampling Frequency. The ADC sampling interval can be obtained once connected to Chronos-Q via chronosq_rfsoc_driver.rfsoc.ChronosQRFSoC.adc_sampling_interval attribute of ChronosQRFSoC object.
[in]	num_adc_samples	Number of ADC samples used for demodulator calculations. This number will be rounded [Up/Down] to the nearest multiple of 8. Valid values are from 0 to 65536, but is also limited by overflow condition as sum of data can potentially overflow if number of adc samples is too high.

Returns

None

Member Data Documentation

frequency_word

frequency_word

Object holding binary representation of angle step in half-pi steps.
This value should be set using setup function; DemodBlock.setup, or via the DemodBlock.set_frequency function.

id

id

Unique ID for demodulator block.

num_cycles

num_cycles

Number of FPGA clock cycles required to process the ADC samples during demodulation calculations.
Currently the ADC is 8x faster than FPGA. Hence every FPGA clock cycle, 8 ADC samples is available.